This question is motivated by some bad Verilog. Due to someone being sloppy with port assignments and a output statement, I have an AES core that has a single-bit from a S-Box in the key schedule tied to a pin. This was caught in my audit of the HDL; however, it's sort of a neat error. Due to the nature of the hardware, I can get 10-bits of information about the key out of it as it's configured for AES-128 and it's a very parallel implementation (it's actually the LSB of the squaring module in the S-Box on the lowest byte of the key). This got me thinking:
If you are an attacker and could watch one bit of AES-128 for 10 rounds, which bit would you choose to recover the most useful information? I feel it would be a bit in the key schedule.